SoC Physical Design Verification Engineer

Summary

Posted: Oct 28, 2024

Role Number:200575922

At Apple, we work every single day to craft products that enrich people’s lives! Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining our group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, we will enable our customers to do all the things they love with their devices! In this highly visible role, you will be a part of a critical team responsible for physical verification of an SOC.

Description

– As a member of our physical design team, you will perform various types of physical verification checks such as LVS, DRC, ANT, and ESD at the chip and block level. – You will collaborate with the CAD/Technology teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout. – You will lead schedules and support cross-functional engineering efforts. – You will work on padring, bump, RDL design, and working with the package and floorplan teams.

Minimum Qualifications

• Minimum BS in Electrical/Electronics/Computer Engineering or related field.
• 3+ years of relevant industry experience.
• Direct experience with physical verification flows and methodology through tape out execution.
• Knowledge of all aspects of ASIC physical design.
• Knowledge of place and route design flow methodology.
• Scripting skills to debug flow related issues and make enhancements as appropriate.
• Direct work experience with industry standard tools used for physical verification such as Mentor Calibre, Synopsys ICV, etc.
• Full chip tapeout experience with a track record of successful signoff.

Preferred Qualifications

• MS in Electrical/Electronics/Computer Engineering or related field.
• Proficient scripting skills and automation experience.
• Layout or floorplan design experience.
• Physical design verification and debug experience including mixed signal and digital IP integrations at block and full-chip hierarchies.

Pay & Benefits

• At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.
  
  Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
  
  Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.