CPU Cache Microarchitect/RTL Engineer

Summary

Posted: Oct 7, 2024

Role Number:200571946

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there’s no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for a dedicated engineer to contribute to CPU multi-level cache subsystem architecture and RTL development for multi-processor systems.

Description

As a CPU Cache Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification – from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification. • RTL ownership – development, assessment and refinement of RTL design to target power, performance, area and timing goals. • Verification – support the verification team in test bench development, formal methods, and simulation/emulation for formal verification • Performance exploration and correlation – explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance. • Design delivery – work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power.

Minimum Qualifications

• Minimum BS
• Knowledge of microprocessor architecture
• Knowledge of Verilog and/or VHDL
• Experience with simulators and waveform debugging tools
• Knowledge of logic design principles along with timing and power implications

Preferred Qualifications

• Expertise in one or more of the following areas:
• Coherence protocols and interconnects
• High performance (low latency, high bandwidth) design techniques
• Memory subsystem queuing, scheduling; starvation and deadlock avoidance
• SRAM design basics
• Multiple clock/power domains and power management strategies
• Prefetchers, replacement policies
• Debug capabilities
• DFT strategies
• Error detection and correction
• Understanding of low power microarchitecture techniques
• Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
• Experience in C or C++ programming
• Experience using an interpretive language such as Perl or Python

Pay & Benefits

• At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $121,900 and $183,600, and your base pay will depend on your skills, qualifications, experience, and location.
  
  Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
  
  Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.