Graphics Cache Hierarchy Design Verification Engineer

Summary

Posted: Oct 24, 2024

Role Number:200575487

Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Cache Hierarchy Verification Engineer will be responsible for the pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects and Link interface units. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, and a solid foundation in verification methodology is required.

Description

In this role you will: – Develop verification plans in coordination with design leads and architects. – Build and maintain portable verification test bench components and environments. – Generate directed and constrained random tests. – Run simulations and debug design and environment issues. – Create functional coverage points, analyze coverage, and improve test environment to target coverage holes. – Create automated verification flows for block verification. – Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs. – Work with other block, memory subsystem and core level engineers to ensure seamless verification flow.

Minimum Qualifications

• Experience in CPU or GPU architecture.
• Experience developing unit or cluster level test environments.
• Experience with driving bring up and debug of complex designs.
• Experience with verification languages such as SystemVerilog.
• Experience with HDL simulators and waveform viewers.
• BS + minimum of 3 years of experience.

Preferred Qualifications

• Strong fundamental software and programming skills.
• Experience with cache verification and memory subsystem testing highly desired.
• Understanding of the Graphics Pipeline a plus.
• Experience defining and executing unit level test plans.
• Experience with common verification methodologies such as UVM.
• Experience defining coverage space, writing coverage and coverage closure.
• Experience with Perl, Ruby, Shell scripting, Makefiles.

Pay & Benefits

• At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $143,100 and $264,200, and your base pay will depend on your skills, qualifications, experience, and location.
  
  Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
  
  Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.